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Merge branch 'master' into dhanya_devel

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This commit is contained in:
Dhanya Maliakal 2015-01-29 15:15:16 +01:00
commit 058f988586
9 changed files with 321 additions and 148 deletions
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10
slsDetectorSoftware/jungfrauDetectorServer/Makefile
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@ -23,12 +23,20 @@ OBJS = $(SRCS:%.c=%.o)
all: clean $(PROGS) all: clean $(PROGS)
test: clean jungfrauADCTEst
boot: $(OBJS) boot: $(OBJS)
$(PROGS): $(OBJS) jungfrauDetectorServer: $(OBJS)
echo $(OBJS) echo $(OBJS)
$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@) $(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@)
jungfrauADCTEst: $(OBJS)
echo $(OBJS)
$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@) -DTESTADC
install: $(PROGS) install: $(PROGS)
$(INSTALL) -d $(INSTDIR) $(INSTALL) -d $(INSTDIR)

407
slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c
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@ -1,3 +1,5 @@
//#define TESTADC
#include "server_defs.h" #include "server_defs.h"
#include "firmware_funcs.h" #include "firmware_funcs.h"
@ -48,7 +50,7 @@ int phase_shift=0;//DEFAULT_PHASE_SHIFT;
int ipPacketSize=DEFAULT_IP_PACKETSIZE; int ipPacketSize=DEFAULT_IP_PACKETSIZE;
int udpPacketSize=DEFAULT_UDP_PACKETSIZE; int udpPacketSize=DEFAULT_UDP_PACKETSIZE;
u_int32_t clkDivider[2]={32,32}; u_int32_t clkDivider[2]={160,32};
int ififostart, ififostop, ififostep, ififo; int ififostart, ififostop, ififostep, ififo;
@ -263,42 +265,42 @@ int setPhaseShiftOnce(){
int cleanFifo(){ int cleanFifo(){
u_int32_t addr, reg, val, adc_sync; /* u_int32_t addr, reg, val, adc_sync; */
printf("Cleaning FIFO\n"); /* printf("Cleaning FIFO\n"); */
addr=ADC_SYNC_REG; /* addr=ADC_SYNC_REG; */
if(withGotthard) /* if(withGotthard) */
adc_sync = GOTTHARD_ADCSYNC_VAL; /* adc_sync = GOTTHARD_ADCSYNC_VAL; */
else /* else */
adc_sync = ADCSYNC_VAL; /* adc_sync = ADCSYNC_VAL; */
reg = bus_r(addr) & CLEAN_FIFO_MASK; /* reg = bus_r(addr) & CLEAN_FIFO_MASK; */
//only for start up /* //only for start up */
if(!reg) reg = adc_sync; /* if(!reg) reg = adc_sync; */
// 88 3 02111 /* // 88 3 02111 */
if (ROI_flag==0) { /* if (ROI_flag==0) { */
val=reg | ADCSYNC_CLEAN_FIFO_BITS | TOKEN_RESTART_DELAY; /* val=reg | ADCSYNC_CLEAN_FIFO_BITS | TOKEN_RESTART_DELAY; */
bus_w(addr,val); /* bus_w(addr,val); */
// 88 0 02111 /* // 88 0 02111 */
val=reg | TOKEN_RESTART_DELAY; /* val=reg | TOKEN_RESTART_DELAY; */
bus_w(addr,val); /* bus_w(addr,val); */
} /* } */
else { /* else { */
//1b332214 /* //1b332214 */
val=reg | ADCSYNC_CLEAN_FIFO_BITS | TOKEN_RESTART_DELAY_ROI; /* val=reg | ADCSYNC_CLEAN_FIFO_BITS | TOKEN_RESTART_DELAY_ROI; */
bus_w(addr,val); /* bus_w(addr,val); */
//1b032214 /* //1b032214 */
val=reg | TOKEN_RESTART_DELAY_ROI; /* val=reg | TOKEN_RESTART_DELAY_ROI; */
bus_w(addr,val); /* bus_w(addr,val); */
} /* } */
reg=bus_r(addr); /* reg=bus_r(addr); */
//#ifdef DDEBUG /* //#ifdef DDEBUG */
printf("ADC SYNC reg 0x19:%x\n",reg); /* printf("ADC SYNC reg 0x19:%x\n",reg); */
//#endif /* //#endif */
return OK; return OK;
} }
@ -363,21 +365,28 @@ u_int32_t readin(int modnum) {
u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig) { u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig) {
u_int32_t vv=reg<<PLL_CNTR_ADDR_OFF; u_int32_t vv;
bus_w(PLL_PARAM_REG,val); bus_w(PLL_PARAM_REG,val);
printf("param: %x\n",val); printf("param: %x\n",val);
vv=reg<<PLL_CNTR_ADDR_OFF;
bus_w(PLL_CNTRL_REG,vv); bus_w(PLL_CNTRL_REG,vv);
printf("wrote: %08x\n",vv); printf("wrote: %08x\n",vv);
usleep(1000); usleep(1000);
vv=(1<<PLL_CNTR_WRITE_BIT)|(reg<<PLL_CNTR_ADDR_OFF)|(trig<<15); vv=(1<<PLL_CNTR_WRITE_BIT)|(reg<<PLL_CNTR_ADDR_OFF)|(trig<<15);
bus_w(PLL_CNTRL_REG,vv);//15 is trigger for the tap bus_w(PLL_CNTRL_REG,vv);//15 is trigger for the tap
printf("wrote: %08x\n",vv); printf("wrote: %08x\n",vv);
usleep(1000); usleep(1000);
vv=(reg<<PLL_CNTR_ADDR_OFF); vv=(reg<<PLL_CNTR_ADDR_OFF);
printf("wrote: %08x\n",vv); printf("wrote: %08x\n",vv);
bus_w(PLL_CNTRL_REG,vv); bus_w(PLL_CNTRL_REG,vv);
usleep(1000); usleep(1000);
while(bus_r(STATUS_REG)&PLL_RECONFIG_BUSY) { while(bus_r(STATUS_REG)&PLL_RECONFIG_BUSY) {
printf("set: reconfig busy"); printf("set: reconfig busy");
} }
@ -445,7 +454,7 @@ u_int32_t setClockDivider(int d, int ic) {
u_int32_t l=0x0c; u_int32_t l=0x0c;
u_int32_t h=0x0d; u_int32_t h=0x0d;
u_int32_t val; u_int32_t val;
int i;
u_int32_t tot=800/d; u_int32_t tot=800/d;
u_int32_t odd=0; u_int32_t odd=0;
@ -456,37 +465,62 @@ u_int32_t setClockDivider(int d, int ic) {
if (ic>1) if (ic>1)
return -1; return -1;
if (ic==1 && d>40)
return -1;
if (d>160)
return -1;
if (tot>510)
return -1;
if (tot<1)
return -1;
l=tot/2;
h=l;
if (tot>2*l) {
h=l+1;
odd=1;
}
printf("Low is %d, High is %d\n",l,h);
if (l>255 || h>255) clkDivider[ic]=d;
return -1; //values out of range
bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_RECONFIG_RESET_BIT)); //reset pll reconfig
usleep(100);
bus_w(PLL_CNTRL_REG, 0);
usleep(10000);
setPllReconfigReg(PLL_MODE_REG,1,0); setPllReconfigReg(PLL_MODE_REG,1,0);
usleep(10000);
getPllReconfigReg(PLL_MODE_REG,0); // getPllReconfigReg(PLL_MODE_REG,0);
val= (ic<<18)| (odd<<17) | l | (h<<8); //odd division
printf("val: %08x\n", val); for (i=0; i<1; i++) {
tot=800/clkDivider[i];
l=tot/2;
h=l;
if (tot>2*l) {
h=l+1;
odd=1;
}
printf("Counter %d: Low is %d, High is %d\n",i, l,h);
val= (i<<18)| (odd<<17) | l | (h<<8);
printf("Counter %d, val: %08x\n", i, val);
setPllReconfigReg(PLL_C_COUNTER_REG, val,0);
usleep(10000);
}
setPllReconfigReg(PLL_C_COUNTER_REG, val,1);
setPllReconfigReg(PLL_START_REG, 1,1); setPllReconfigReg(PLL_START_REG, 1,1);
usleep(100000); usleep(100000);
bus_w(PLL_CNTRL_REG, 0); bus_w(PLL_CNTRL_REG, 0);
clkDivider[ic]=d;
return clkDivider[ic]; return clkDivider[ic];
} }
@ -502,6 +536,11 @@ int phaseStep(int st, int ic){
/* ic=0; */ /* ic=0; */
/* st*=-1; */ /* st*=-1; */
/* } */ /* } */
bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_RECONFIG_RESET_BIT)); //reset PLL and pll reconfig
usleep(100);
bus_w(PLL_CNTRL_REG, 0);
bus_w(PLL_CNTRL_REG, 0); bus_w(PLL_CNTRL_REG, 0);
setPllReconfigReg(PLL_MODE_REG,1,0); setPllReconfigReg(PLL_MODE_REG,1,0);
getPllReconfigReg(PLL_MODE_REG,0); getPllReconfigReg(PLL_MODE_REG,0);
@ -513,7 +552,7 @@ int phaseStep(int st, int ic){
usleep(100000); usleep(100000);
bus_w(PLL_CNTRL_REG, 0); bus_w(PLL_CNTRL_REG, 0);
setClockDivider(clkDivider[ic],ic); //setClockDivider(clkDivider[ic],ic);
return st; return st;
@ -1344,49 +1383,52 @@ int getTemperature(int tempSensor, int imod){
int initHighVoltage(int val, int imod){ int initHighVoltage(int val, int imod){
#ifdef VERBOSE
printf("Setting/Getting High Voltage of module:%d with val:%d\n",imod,val); printf("*******SetHV: Doing nothing - still to be implemented!\n");
#endif
volatile u_int32_t addr=HV_REG; /* #ifdef VERBOSE */
int writeVal,writeVal2; /* printf("Setting/Getting High Voltage of module:%d with val:%d\n",imod,val); */
switch(val){ /* #endif */
case -1: break; /* volatile u_int32_t addr=HV_REG; */
case 0: writeVal=0x0; writeVal2=0x0; break; /* int writeVal,writeVal2; */
case 90: writeVal=0x0; writeVal2=0x1; break; /* switch(val){ */
case 110:writeVal=0x2; writeVal2=0x3; break; /* case -1: break; */
case 120:writeVal=0x4; writeVal2=0x5; break; /* case 0: writeVal=0x0; writeVal2=0x0; break; */
case 150:writeVal=0x6; writeVal2=0x7; break; /* case 90: writeVal=0x0; writeVal2=0x1; break; */
case 180:writeVal=0x8; writeVal2=0x9; break; /* case 110:writeVal=0x2; writeVal2=0x3; break; */
case 200:writeVal=0xA; writeVal2=0xB; break; /* case 120:writeVal=0x4; writeVal2=0x5; break; */
default :printf("Invalid voltage\n");return -2;break; /* case 150:writeVal=0x6; writeVal2=0x7; break; */
} /* case 180:writeVal=0x8; writeVal2=0x9; break; */
//to set value /* case 200:writeVal=0xA; writeVal2=0xB; break; */
if(val!=-1){ /* default :printf("Invalid voltage\n");return -2;break; */
//set value to converted value /* } */
bus_w(addr,writeVal); /* //to set value */
bus_w(addr,writeVal2); /* if(val!=-1){ */
#ifdef VERBOSE /* //set value to converted value */
printf("Value sent is %d and then %d\n",writeVal,writeVal2); /* bus_w(addr,writeVal); */
#endif /* bus_w(addr,writeVal2); */
} /* #ifdef VERBOSE */
//read value and return the converted value /* printf("Value sent is %d and then %d\n",writeVal,writeVal2); */
val=bus_r(addr); /* #endif */
#ifdef VERBOSE /* } */
printf("Value read from reg is %d\n",val); /* //read value and return the converted value */
#endif /* val=bus_r(addr); */
switch(val){ /* #ifdef VERBOSE */
case 0x0:val=0;break; /* printf("Value read from reg is %d\n",val); */
case 0x1:val=90;break; /* #endif */
case 0x3:val=110;break; /* switch(val){ */
case 0x5:val=120;break; /* case 0x0:val=0;break; */
case 0x7:val=150;break; /* case 0x1:val=90;break; */
case 0x9:val=180;break; /* case 0x3:val=110;break; */
case 0xB:val=200;break; /* case 0x5:val=120;break; */
default:printf("Weird value read:%d\n",val);return -3;break; /* case 0x7:val=150;break; */
} /* case 0x9:val=180;break; */
#ifdef VERBOSE /* case 0xB:val=200;break; */
printf("High voltage of module:%d is %d\n",imod,val); /* default:printf("Weird value read:%d\n",val);return -3;break; */
#endif /* } */
/* #ifdef VERBOSE */
/* printf("High voltage of module:%d is %d\n",imod,val); */
/* #endif */
return val; return val;
} }
@ -1722,7 +1764,12 @@ int i;
//#ifdef VERBOSE //#ifdef VERBOSE
printf("*******Starting State Machine*******\n"); printf("*******Starting State Machine*******\n");
//#endif //#endif
cleanFifo();
//NEEDED?
// cleanFifo();
// fifoReset(); // fifoReset();
now_ptr=(char*)ram_values; now_ptr=(char*)ram_values;
#ifdef SHAREDMEMORY #ifdef SHAREDMEMORY
@ -1849,15 +1896,16 @@ u_int16_t* fifo_read_event()
{ {
int i=0; int i=0, j=0;
#ifdef VIRTUAL #ifdef VIRTUAL
return NULL; return NULL;
#endif #endif
#ifdef VERBOSE //#ifdef VERBOSE
printf("before looping\n"); printf("before looping\n");
volatile u_int32_t fs; volatile u_int32_t fs;
#endif u_int16_t *dum;
//#endif
volatile u_int32_t t = bus_r16(LOOK_AT_ME_REG); volatile u_int32_t t = bus_r16(LOOK_AT_ME_REG);
#ifdef VERBOSE #ifdef VERBOSE
@ -1874,6 +1922,7 @@ u_int16_t* fifo_read_event()
} }
*/ */
bus_w(DUMMY_REG,0);
while(t==0) { while(t==0) {
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
printf("before readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG)); printf("before readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
@ -1914,28 +1963,48 @@ u_int16_t* fifo_read_event()
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
printf(" out of while loop!\n"); printf(" out of while loop!\n");
#endif #endif
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
printf("before readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG)); printf("before readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
i=0; i=0;
for (i=0; i<32; i++) { for (i=0; i<32; i++) {
printf("Fifo %d (%04x) status :\n", i,FIFO_STATUS_REG | i); // printf("Fifo %d (%04x) status :\n", i,FIFO_STATUS_REG | i);
fs=bus_r16(FIFO_STATUS_REG | i); fs=bus_r16(FIFO_STATUS_REG| i);
printf("before: %x\n",fs); if (fs&0xfff0fff)
printf("before %d: %x\n",i, fs);
} }
#endif #endif
dma_memcpy(now_ptr,values ,dataBytes); /* dma_memcpy(now_ptr,values ,dataBytes); */
/* #else */
for (i=0; i<32; i++) {
dum=((u_int16_t*)(now_ptr))+i;
bus_w(DUMMY_REG,i<<1);
#ifdef TESTADC
printf("%d s:%04x ",i,bus_r16(FIFO_STATUS_REG));
#endif
bus_w(DUMMY_REG,(i<<1) | 1);
bus_w(DUMMY_REG,i<<1);
*dum=bus_r16(FIFO_DATA_REG);// | i); //values[i];
#ifdef TESTADC
printf("d:%04x s:%04x\n",*dum&0x3fff, bus_r16(FIFO_STATUS_REG));
#endif
}
//#endif
printf("-"); printf("-");
//memcpy(now_ptr,values ,dataBytes); //this reads the fifo twice... //memcpy(now_ptr,values ,dataBytes); //this reads the fifo twice...
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
printf("after readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
i=0;
for (i=0; i<32; i++) { for (i=0; i<32; i++) {
fs=bus_r16(FIFO_STATUS_REG | i); fs=bus_r16(FIFO_STATUS_REG| i);
printf("after %d: %x\n",i, fs); if (fs&0xfff0fff)
printf("after %d: %x\n",i, fs);
} }
#endif #endif
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
int a; int a;
@ -2154,44 +2223,118 @@ int allocateRAM() {
} }
int writeADC(int addr, int val) {
u_int32_t valw,codata,csmask;
int i,cdx,ddx,j;
cdx=0; ddx=1;
csmask=0xfc; // 1111100
codata=val + (addr<< 8);
printf("***** ADC SPI WRITE TO REGISTER %04X value %04X\n",addr,val);
// start point
valw=0xff;
bus_w(ADC_WRITE_REG,(valw));
//chip sel bar down
valw=((0xffffffff&(~csmask)));
bus_w(ADC_WRITE_REG,valw);
for (i=0;i<24;i++) {
//cldwn
valw=valw&(~(0x1<<cdx));
bus_w(ADC_WRITE_REG,valw);
usleep(0);
//write data (i)
valw=(valw&(~(0x1<<ddx)))+(((codata>>(23-i))&0x1)<<ddx);
bus_w(ADC_WRITE_REG,valw);
usleep(0);
//clkup
valw=valw+(0x1<<cdx);
bus_w(ADC_WRITE_REG,valw);
usleep(0);
}
// stop point =start point
valw=valw&(~(0x1<<cdx));
usleep(0);
valw=0xff;
bus_w(ADC_WRITE_REG,(valw));
//usleep in between
usleep(50000);
return OK;
}
int prepareADC(){ int prepareADC(){
printf("Preparing ADC\n"); printf("Preparing ADC\n");
u_int32_t valw,codata,csmask; u_int32_t valw,codata,csmask;
int i,cdx,ddx; int i,cdx,ddx,j;
cdx=0; ddx=1; cdx=0; ddx=1;
csmask=0x7c; // 1111100 csmask=0x7c; // 1111100
codata=0; codata=0;
codata=(0x14<<8)+(0x0); //command and value; writeADC(0x08,0x3);
valw=0xff; writeADC(0x08,0x0);
bus_w(ADC_WRITE_REG,(valw)); // start point writeADC(0x14,0x40);//lvds reduced range
valw=((0xffffffff&(~csmask))); // writeADC(0x14,0x00);//lvds
bus_w(ADC_WRITE_REG,valw); //chip sel bar down
for (i=0;i<24;i++) {
valw=valw&(~(0x1<<cdx));//cldwn writeADC(0x16,0x01);//output clock phase
bus_w(ADC_WRITE_REG,valw); // writeADC(0x16,0x07);//output clock phase
usleep(0);
#ifdef VERBOSE // writeADC(0x16,0x4);//output clock phase
printf("DOWN 0x%x \n",valw);
#endif writeADC(0xD,0x0);//no test mode
valw=(valw&(~(0x1<<ddx)))+(((codata>>(23-i))&0x1)<<ddx); //write data (i)
bus_w(ADC_WRITE_REG,valw); #ifdef TESTADC
usleep(0);
#ifdef VERBOSE
printf("LOW 0x%x \n",valw); ////////////TEST ADC!!!!!!!!!!
#endif
valw=valw+(0x1<<cdx);bus_w(ADC_WRITE_REG,valw); //clkup printf("***************************************** *******\n");
usleep(0); printf("******* PUTTING ADC IN TEST MODE!!!!!!!!! *******\n");
#ifdef VERBOSE printf("***************************************** *******\n");
printf("up 0x%x \n",valw);
#endif
} // writeADC(0xD,0x4);//ALTERNATING CHECKERBOARD
// writeADC(0xD,0x7);//ONE/ZERO WORD TOGGLE
/* writeADC(0x19,0xf0);//user input */
/* writeADC(0x1A,0xf0);//user input */
/* writeADC(0x1B,0x0f);//user input */
/* writeADC(0x1C,0x0f);//user input */
/* writeADC(0xD,0x48);//user input, alternate */
/* //writeADC(0xD,0xA);//1xsync */
// writeADC(0xD,0xB);//1xbit high
writeADC(0xD,0xC);//1xmixed frequqncy
#endif
valw=valw&(~(0x1<<cdx));usleep(0);
valw=0xff; bus_w(ADC_WRITE_REG,(valw)); // stop point =start point */
bus_w(ADC_LATCH_DISABLE_REG,0x0); // enable all ADCs bus_w(ADC_LATCH_DISABLE_REG,0x0); // enable all ADCs
bus_w(DAQ_REG,0xd); bus_w(DAQ_REG,0xd); //adc pipeline=13
bus_w(ADC_OFFSET_REG,0xbbbbbbbb);
// bus_w(ADC_INVERSION_REG,0x1f6170c6);
return; return;
} }

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slsDetectorSoftware/jungfrauDetectorServer/jungfrauDetectorServer
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slsDetectorSoftware/jungfrauDetectorServer/jungfrauDetectorServer.gdb
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5
slsDetectorSoftware/jungfrauDetectorServer/registers_m.h
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@ -116,8 +116,8 @@
//#define ADC_SYNC_REG 66<<11//0x19<<11 //#define ADC_SYNC_REG 66<<11//0x19<<11
//#define HV_REG 67<<11//0x20<<11 //#define HV_REG 67<<11//0x20<<11
#define ADCCLK_MASK_REG 66<<11 #define ADC_OFFSET_REG 66<<11
#define ADC_INVERSION_REG 66<<11 #define ADC_INVERSION_REG 67<<11
//#define MUTIME_REG 0x1a<<11 //#define MUTIME_REG 0x1a<<11
//temperature //temperature
@ -351,6 +351,7 @@
#define FIFO_RESET_BIT 0x8000 #define FIFO_RESET_BIT 0x8000
#define SYNC_RESET 0x0400 #define SYNC_RESET 0x0400
#define GB10_RESET_BIT 0x0800 #define GB10_RESET_BIT 0x0800
#define MEM_RESET_BIT 0x1000
/* for status register */ /* for status register */
#define RUN_BUSY_BIT 0x00000001 #define RUN_BUSY_BIT 0x00000001

2
slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c
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@ -1886,7 +1886,7 @@ int get_run_status(int file_des) {
printf("-----------------------------------READ MACHINE BUSY--------------------------\n"); printf("-----------------------------------READ MACHINE BUSY--------------------------\n");
s=TRANSMITTING; s=TRANSMITTING;
} else if (retval&ALL_FIFO_EMPTY_BIT) { } else if (!(retval&ALL_FIFO_EMPTY_BIT)) {
printf("-----------------------------------DATA IN FIFO--------------------------\n"); printf("-----------------------------------DATA IN FIFO--------------------------\n");
s=TRANSMITTING; s=TRANSMITTING;

12
slsDetectorSoftware/multiSlsDetector/multiSlsDetector.cpp
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@ -102,6 +102,9 @@ multiSlsDetector::multiSlsDetector(int id) : slsDetectorUtils(), shmId(-1)
} }
id--; id--;
for (int id=0; id<MAXDET; id++) {
detectors[id]=NULL;
}
if (thisMultiDetector->alreadyExisting==0) { if (thisMultiDetector->alreadyExisting==0) {
@ -250,8 +253,8 @@ multiSlsDetector::multiSlsDetector(int id) : slsDetectorUtils(), shmId(-1)
// setAngularConversionPointer(detectors[i]->getAngularConversionPointer(),detectors[i]->getNModsPointer(),detectors[i]->getNChans()*detectors[i]->getNChips(), i); // setAngularConversionPointer(detectors[i]->getAngularConversionPointer(),detectors[i]->getNModsPointer(),detectors[i]->getNChans()*detectors[i]->getNChips(), i);
} }
for (int i=thisMultiDetector->numberOfDetectors; i<MAXDET; i++) // for (int i=thisMultiDetector->numberOfDetectors; i<MAXDET; i++)
detectors[i]=NULL; // detectors[i]=NULL;
@ -363,7 +366,7 @@ void multiSlsDetector::updateOffsets(){
thisMultiDetector->maxNumberOfChannel[Y] = 0; thisMultiDetector->maxNumberOfChannel[Y] = 0;
//0th position //0th position
if (detectors[0]){ if ((detectors[0]) && (thisMultiDetector->numberOfDetectors > 0)){
offsetX = thisMultiDetector->offsetX[0] = 0; offsetX = thisMultiDetector->offsetX[0] = 0;
offsetY = thisMultiDetector->offsetY[0] = 0; offsetY = thisMultiDetector->offsetY[0] = 0;
numX = thisMultiDetector->numberOfChannel[X] = detectors[0]->getTotalNumberOfChannels(X); numX = thisMultiDetector->numberOfChannel[X] = detectors[0]->getTotalNumberOfChannels(X);
@ -774,7 +777,6 @@ int multiSlsDetector::removeSlsDetector(int pos) {
return thisMultiDetector->numberOfDetectors; return thisMultiDetector->numberOfDetectors;
//j=pos; //j=pos;
for (j=mi; j<ma; j++) { for (j=mi; j<ma; j++) {
if (detectors[j]) { if (detectors[j]) {
@ -784,10 +786,10 @@ int multiSlsDetector::removeSlsDetector(int pos) {
thisMultiDetector->maxNumberOfChannels-=detectors[j]->getMaxNumberOfChannels(); thisMultiDetector->maxNumberOfChannels-=detectors[j]->getMaxNumberOfChannels();
delete detectors[j]; delete detectors[j];
detectors[j]=0;
thisMultiDetector->numberOfDetectors--; thisMultiDetector->numberOfDetectors--;
if (single) { if (single) {
for (int i=j+1; i<thisMultiDetector->numberOfDetectors+1; i++) { for (int i=j+1; i<thisMultiDetector->numberOfDetectors+1; i++) {
detectors[i-1]=detectors[i]; detectors[i-1]=detectors[i];

18
slsDetectorSoftware/slsDetector/slsDetector.cpp
View File

@ -4384,6 +4384,23 @@ double* slsDetector::decodeData(int *datain, double *fdata) {
int ipos=0, ichan=0, ibyte; int ipos=0, ichan=0, ibyte;
if (thisDetector->timerValue[PROBES_NUMBER]==0) { if (thisDetector->timerValue[PROBES_NUMBER]==0) {
if (thisDetector->myDetectorType==JUNGFRAUCTB) {
for (ichan=0; ichan<nch; ichan++) {
// dataout[ichan]=0;
ival=0;
// for (ibyte=0; ibyte<2; ibyte++) {
ibyte=0;
iptr=ptr[ichan*2+ibyte];
ival|=((iptr<<(ibyte*bytesize))&(0xff<<(ibyte*bytesize)));
ibyte=1;
iptr=ptr[ichan*2+ibyte];
ival|=((iptr<<(ibyte*bytesize))&(0x3f<<(ibyte*bytesize)));
// }
dataout[ichan]=ival;
}
} else {
switch (nbits) { switch (nbits) {
case 1: case 1:
for (ibyte=0; ibyte<thisDetector->dataBytes; ibyte++) { for (ibyte=0; ibyte<thisDetector->dataBytes; ibyte++) {
@ -4430,6 +4447,7 @@ double* slsDetector::decodeData(int *datain, double *fdata) {
dataout[ichan]=ival; dataout[ichan]=ival;
} }
} }
}
} else { } else {
for (ichan=0; ichan<nch; ichan++) { for (ichan=0; ichan<nch; ichan++) {
dataout[ichan]=datain[ichan]; dataout[ichan]=datain[ichan];

1
slsDetectorSoftware/slsDetectorAnalysis/postProcessing.cpp
View File

@ -441,6 +441,7 @@ void* postProcessing::processData(int delflag) {
} }
} }
dum=0; dum=0;
usleep(500);
} }
if (fdata) { if (fdata) {