m3: update deserializers except for deserializer reg

This commit is contained in:
2020-08-03 17:23:04 +02:00
parent 8631f5e2b0
commit 0514f00552
5 changed files with 70 additions and 6 deletions

View File

@ -552,6 +552,7 @@ int setDynamicRange(int dr) {
// set it
bus_w(CONFIG_REG, bus_r(CONFIG_REG) & ~CONFIG_DYNAMIC_RANGE_MSK);
bus_w(CONFIG_REG, bus_r(CONFIG_REG) | regval);
updateNumberOfDeserializers();
}
uint32_t regval = bus_r(CONFIG_REG) & CONFIG_DYNAMIC_RANGE_MSK;
@ -1032,6 +1033,7 @@ void setCounterMask(uint32_t arg) {
CONFIG_COUNTERS_ENA_MSK));
LOG(logDEBUG, ("Config Reg: 0x%x\n", bus_r(addr)));
updateNumberOfDeserializers();
updateGatePeriod();
}
@ -1040,6 +1042,34 @@ uint32_t getCounterMask() {
CONFIG_COUNTERS_ENA_OFST);
}
void updateNumberOfDeserializers() {
const uint32_t counterMask = getCounterMask();
const int ncounters = __builtin_popcount(counterMask);
const int dr = setDynamicRange(-1);
const int tgEnable = enableTenGigabitEthernet(-1);
int packetsPerFrame = 0;
// 10g
if (tgEnable) {
packetsPerFrame = 1;
if (dr == 32 && n > 1) {
packetsPerFrame = 2;
}
}
// 1g
else {
int datasize = 1280;
if (n == 3) {
dataSize = 768;
}
packetsPerFrame = imageSize / dataSize;
}
int numDeserializers = MAX_NUM_DESERIALIZERS / packetsPerFrame;
// bus_w()
LOG(logINFO, ("Number of Deserializers: %d\n", numDeserializers));
}
int setDelayAfterTrigger(int64_t val) {
if (val < 0) {
LOG(logERROR,
@ -1509,6 +1539,7 @@ int enableTenGigabitEthernet(int val) {
else {
bus_w(addr, bus_r(addr) & (~PKT_CONFIG_1G_INTERFACE_MSK));
}
updateNumberOfDeserializers();
}
int oneG = ((bus_r(addr) & PKT_CONFIG_1G_INTERFACE_MSK) >>
PKT_CONFIG_1G_INTERFACE_OFST);

View File

@ -49,6 +49,7 @@
#define FIXED_PLL_FREQUENCY (020000000) // 20MHz
#define READOUT_PLL_VCO_FREQ_HZ (1250000000) // 1.25GHz
#define SYSTEM_PLL_VCO_FREQ_HZ (1000000000) // 1GHz
#define MAX_NUM_DESERIALIZERS (40)
/** Other Definitions */
#define BIT16_MASK (0xFFFF)