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mythen3 and gotthard2: updated clocks

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This commit is contained in:
maliakal_d 2020-02-24 16:50:47 +01:00
parent 87d48fd943
commit 02b367ffe8
5 changed files with 5 additions and 5 deletions
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slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer
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4
slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h
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@ -49,8 +49,8 @@
/* Firmware Definitions */
#define IP_HEADER_SIZE (20)
#define FIXED_PLL_FREQUENCY (020000000) // 20MHz
#define READOUT_PLL_VCO_FREQ_HZ (866666688) // Hz
#define SYSTEM_PLL_VCO_FREQ_HZ (722222240) // Hz
#define READOUT_PLL_VCO_FREQ_HZ (866666688) // 866 MHz
#define SYSTEM_PLL_VCO_FREQ_HZ (722222224) // 722 MHz
/** Other Definitions */
#define BIT16_MASK (0xFFFF)

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slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServer_developer
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slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h
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@ -33,7 +33,7 @@
#define DEFAULT_HIGH_VOLTAGE (0)
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_READOUT_C0 (125000000) // rdo_clk, 125 MHz
#define DEFAULT_READOUT_C1 (250000000) // rdo_x2_clk, 250 MHz
#define DEFAULT_READOUT_C1 (125000000) // rdo_x2_clk, 125 MHz
#define DEFAULT_SYSTEM_C0 (250000000) // run_clk, 250 MHz
#define DEFAULT_SYSTEM_C1 (125000000) // chip_clk, 125 MHz
#define DEFAULT_SYSTEM_C2 (125000000) // sync_clk, 125 MHz

4
slsSupportLib/include/versionAPI.h
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@ -8,5 +8,5 @@
#define APICTB 0x200131
#define APIJUNGFRAU 0x200131
#define APIMOENCH 0x200131
#define APIMYTHEN3 0x200131
#define APIGOTTHARD2 0x200204
#define APIMYTHEN3 0x200224
#define APIGOTTHARD2 0x200224