module id in udp header for virtual servers for debugging, formatting

This commit is contained in:
maliakal_d 2022-01-12 12:21:17 +01:00
parent 182e5fdadb
commit 01d7831abf
3 changed files with 42 additions and 15 deletions

View File

@ -88,6 +88,7 @@ int eiger_virtual_read_n_rows = 256;
int eiger_virtual_interrupt_subframe = 0; int eiger_virtual_interrupt_subframe = 0;
int eiger_virtual_left_datastream = 1; int eiger_virtual_left_datastream = 1;
int eiger_virtual_right_datastream = 1; int eiger_virtual_right_datastream = 1;
int eiger_virtual_module_id = 0;
#endif #endif
int defaultDacValues[NDAC] = DEFAULT_DAC_VALS; int defaultDacValues[NDAC] = DEFAULT_DAC_VALS;
@ -304,10 +305,9 @@ u_int32_t getDetectorIP() {
void initControlServer() { void initControlServer() {
LOG(logINFOBLUE, ("Configuring Control server\n")); LOG(logINFOBLUE, ("Configuring Control server\n"));
if (!updateFlag && initError == OK) { if (!updateFlag && initError == OK) {
#ifndef VIRTUAL
int modid = getModuleIdInFile(&initError, initErrorMessage, ID_FILE); int modid = getModuleIdInFile(&initError, initErrorMessage, ID_FILE);
#else #ifdef VIRTUAL
getModuleIdInFile(&initError, initErrorMessage, ID_FILE); eiger_virtual_module_id = modid;
#endif #endif
if (initError == FAIL) { if (initError == FAIL) {
return; return;
@ -2408,6 +2408,7 @@ void *start_timer(void *arg) {
header->version = SLS_DETECTOR_HEADER_VERSION; header->version = SLS_DETECTOR_HEADER_VERSION;
header->frameNumber = frameNr + iframes; header->frameNumber = frameNr + iframes;
header->packetNumber = i; header->packetNumber = i;
header->modId = eiger_virtual_module_id;
header->row = row; header->row = row;
header->column = colLeft; header->column = colLeft;
@ -2418,6 +2419,7 @@ void *start_timer(void *arg) {
header->version = SLS_DETECTOR_HEADER_VERSION; header->version = SLS_DETECTOR_HEADER_VERSION;
header->frameNumber = frameNr + iframes; header->frameNumber = frameNr + iframes;
header->packetNumber = i; header->packetNumber = i;
header->modId = eiger_virtual_module_id;
header->row = row; header->row = row;
header->column = colRight; header->column = colRight;
if (eiger_virtual_quad_mode) { if (eiger_virtual_quad_mode) {

View File

@ -41,6 +41,7 @@ char initErrorMessage[MAX_STR_LENGTH];
#ifdef VIRTUAL #ifdef VIRTUAL
pthread_t pthread_virtual_tid; pthread_t pthread_virtual_tid;
int64_t virtual_currentFrameNumber = 2; int64_t virtual_currentFrameNumber = 2;
int virtual_moduleid = 0;
#endif #endif
enum detectorSettings thisSettings = UNINITIALIZED; enum detectorSettings thisSettings = UNINITIALIZED;
@ -101,8 +102,9 @@ void basictests() {
} }
// does check only if flag is 0 (by default), set by command line // does check only if flag is 0 (by default), set by command line
if ((!debugflag) && (!updateFlag) && if ((!debugflag) && (!updateFlag) &&
((validateKernelVersion(KERNEL_DATE_VRSN) == FAIL) || (checkType() == FAIL) || ((validateKernelVersion(KERNEL_DATE_VRSN) == FAIL) ||
(testFpga() == FAIL) || (testBus() == FAIL))) { (checkType() == FAIL) || (testFpga() == FAIL) ||
(testBus() == FAIL))) {
sprintf(initErrorMessage, sprintf(initErrorMessage,
"Could not pass basic tests of FPGA and bus. Dangerous to " "Could not pass basic tests of FPGA and bus. Dangerous to "
"continue. (Firmware version:0x%llx) \n", "continue. (Firmware version:0x%llx) \n",
@ -480,6 +482,9 @@ void setupDetector() {
// set module id in register // set module id in register
int modid = getModuleIdInFile(&initError, initErrorMessage, ID_FILE); int modid = getModuleIdInFile(&initError, initErrorMessage, ID_FILE);
#ifdef VIRTUAL
virtual_moduleid = modid;
#endif
if (initError == FAIL) { if (initError == FAIL) {
return; return;
} }
@ -2083,40 +2088,56 @@ int setReadoutSpeed(int val) {
case G2_108MHZ: case G2_108MHZ:
LOG(logINFOBLUE, ("Setting readout speed to 108 MHz\n")); LOG(logINFOBLUE, ("Setting readout speed to 108 MHz\n"));
if (setClockDivider(READOUT_C0, SPEED_108_CLKDIV_0) == FAIL) { if (setClockDivider(READOUT_C0, SPEED_108_CLKDIV_0) == FAIL) {
LOG(logERROR, ("Could not set readout speed to 108 MHz. Failed to set readout clk 0 to %d\n", SPEED_108_CLKDIV_0)); LOG(logERROR, ("Could not set readout speed to 108 MHz. Failed to "
"set readout clk 0 to %d\n",
SPEED_108_CLKDIV_0));
return FAIL; return FAIL;
} }
if (setClockDivider(READOUT_C1, SPEED_108_CLKDIV_1) == FAIL) { if (setClockDivider(READOUT_C1, SPEED_108_CLKDIV_1) == FAIL) {
LOG(logERROR, ("Could not set readout speed to 108 MHz. Failed to set readout clk 1 to %d\n", SPEED_108_CLKDIV_1)); LOG(logERROR, ("Could not set readout speed to 108 MHz. Failed to "
"set readout clk 1 to %d\n",
SPEED_108_CLKDIV_1));
return FAIL; return FAIL;
} }
if (setPhase(READOUT_C1, SPEED_108_CLKPHASE_DEG_1, 1) == FAIL) { if (setPhase(READOUT_C1, SPEED_108_CLKPHASE_DEG_1, 1) == FAIL) {
LOG(logERROR, ("Could not set readout speed to 108 MHz. Failed to set clk phase 1 %d deg\n", SPEED_108_CLKPHASE_DEG_1)); LOG(logERROR, ("Could not set readout speed to 108 MHz. Failed to "
"set clk phase 1 %d deg\n",
SPEED_108_CLKPHASE_DEG_1));
return FAIL; return FAIL;
} }
setDBITPipeline(SPEED_144_DBIT_PIPELINE); setDBITPipeline(SPEED_144_DBIT_PIPELINE);
if (getDBITPipeline() != SPEED_144_DBIT_PIPELINE) { if (getDBITPipeline() != SPEED_144_DBIT_PIPELINE) {
LOG(logERROR, ("Could not set readout speed to 108 MHz. Failed to set dbitpipeline to %d \n", SPEED_144_DBIT_PIPELINE)); LOG(logERROR, ("Could not set readout speed to 108 MHz. Failed to "
"set dbitpipeline to %d \n",
SPEED_144_DBIT_PIPELINE));
return FAIL; return FAIL;
} }
break; break;
case G2_144MHZ: case G2_144MHZ:
LOG(logINFOBLUE, ("Setting readout speed to 144 MHz\n")); LOG(logINFOBLUE, ("Setting readout speed to 144 MHz\n"));
if (setClockDivider(READOUT_C0, SPEED_144_CLKDIV_0) == FAIL) { if (setClockDivider(READOUT_C0, SPEED_144_CLKDIV_0) == FAIL) {
LOG(logERROR, ("Could not set readout speed to 144 MHz. Failed to set readout clk 0 to %d\n", SPEED_144_CLKDIV_0)); LOG(logERROR, ("Could not set readout speed to 144 MHz. Failed to "
"set readout clk 0 to %d\n",
SPEED_144_CLKDIV_0));
return FAIL; return FAIL;
} }
if (setClockDivider(READOUT_C1, SPEED_144_CLKDIV_1) == FAIL) { if (setClockDivider(READOUT_C1, SPEED_144_CLKDIV_1) == FAIL) {
LOG(logERROR, ("Could not set readout speed to 144 MHz. Failed to set readout clk 1 to %d\n", SPEED_144_CLKDIV_1)); LOG(logERROR, ("Could not set readout speed to 144 MHz. Failed to "
"set readout clk 1 to %d\n",
SPEED_144_CLKDIV_1));
return FAIL; return FAIL;
} }
if (setPhase(READOUT_C1, SPEED_144_CLKPHASE_DEG_1, 1) == FAIL) { if (setPhase(READOUT_C1, SPEED_144_CLKPHASE_DEG_1, 1) == FAIL) {
LOG(logERROR, ("Could not set readout speed to 144 MHz. Failed to set clk phase 1 %d deg\n", SPEED_144_CLKPHASE_DEG_1)); LOG(logERROR, ("Could not set readout speed to 144 MHz. Failed to "
"set clk phase 1 %d deg\n",
SPEED_144_CLKPHASE_DEG_1));
return FAIL; return FAIL;
} }
setDBITPipeline(SPEED_144_DBIT_PIPELINE); setDBITPipeline(SPEED_144_DBIT_PIPELINE);
if (getDBITPipeline() != SPEED_144_DBIT_PIPELINE) { if (getDBITPipeline() != SPEED_144_DBIT_PIPELINE) {
LOG(logERROR, ("Could not set readout speed to 144 MHz. Failed to set dbitpipeline to %d \n", SPEED_144_DBIT_PIPELINE)); LOG(logERROR, ("Could not set readout speed to 144 MHz. Failed to "
"set dbitpipeline to %d \n",
SPEED_144_DBIT_PIPELINE));
return FAIL; return FAIL;
} }
break; break;
@ -3005,7 +3026,7 @@ void *start_timer(void *arg) {
header->version = SLS_DETECTOR_HEADER_VERSION - 1; header->version = SLS_DETECTOR_HEADER_VERSION - 1;
header->frameNumber = virtual_currentFrameNumber; header->frameNumber = virtual_currentFrameNumber;
header->packetNumber = 0; header->packetNumber = 0;
header->modId = 0; header->modId = virtual_moduleid;
header->row = detPos[X]; header->row = detPos[X];
header->column = detPos[Y]; header->column = detPos[Y];
// fill data // fill data

View File

@ -42,6 +42,7 @@ char initErrorMessage[MAX_STR_LENGTH];
#ifdef VIRTUAL #ifdef VIRTUAL
pthread_t pthread_virtual_tid; pthread_t pthread_virtual_tid;
int64_t virtual_currentFrameNumber = 2; int64_t virtual_currentFrameNumber = 2;
int virtual_moduleid = 0;
#endif #endif
enum detectorSettings thisSettings = UNINITIALIZED; enum detectorSettings thisSettings = UNINITIALIZED;
@ -448,6 +449,9 @@ void setupDetector() {
// set module id in register // set module id in register
int modid = getModuleIdInFile(&initError, initErrorMessage, ID_FILE); int modid = getModuleIdInFile(&initError, initErrorMessage, ID_FILE);
#ifdef VIRTUAL
virtual_moduleid = modid;
#endif
if (initError == FAIL) { if (initError == FAIL) {
return; return;
} }
@ -2282,7 +2286,7 @@ void *start_timer(void *arg) {
header->version = SLS_DETECTOR_HEADER_VERSION - 1; header->version = SLS_DETECTOR_HEADER_VERSION - 1;
header->frameNumber = virtual_currentFrameNumber; header->frameNumber = virtual_currentFrameNumber;
header->packetNumber = i; header->packetNumber = i;
header->modId = 0; header->modId = virtual_moduleid;
header->row = detPos[X]; header->row = detPos[X];
header->column = detPos[Y]; header->column = detPos[Y];