diff --git a/include/aare/defs.hpp b/include/aare/defs.hpp
index 0236b45..af73a84 100644
--- a/include/aare/defs.hpp
+++ b/include/aare/defs.hpp
@@ -219,6 +219,17 @@ struct Moench04 {
     constexpr static size_t superColumnWidth = 25;
 };
 
+/// @brief Chip specifications for Moench05
+struct Moench05 {
+    constexpr static size_t nRows = 160;
+    constexpr static size_t nCols =
+        150; // TODO: should probably be seperated for each adc
+
+    /// @brief used ADCs for moench given in relative numbers to the default
+    /// enabled blocks of 4 adcs in absolute adcs 9, 13, 1 are used
+    constexpr static std::array<int, 3> adcNumbers = {5, 9, 1};
+};
+
 enum ReadoutMode : uint8_t {
     ANALOG_ONLY = 0,
     DIGITAL_ONLY = 1,
diff --git a/python/aare/transform.py b/python/aare/transform.py
index 45cc780..6d14231 100644
--- a/python/aare/transform.py
+++ b/python/aare/transform.py
@@ -17,6 +17,15 @@ class AdcSar05060708Transform64to16:
         return _aare.adc_sar_05_06_07_08decode64to16(data)
 
 class Moench05Transform:
+    """
+    Transforms Moench05 chip data from a buffer of bytes (uint8_t)
+    to a numpy array of uint16. Assumes data taken with analog samples and assumes adc 1, 9, 13 are enabled. 
+    (e.g. for 10g mode adc 0,1,2,3 and 8,9,10,11 and 12,13,14,15 are enabled but only adc 1,9,13 contain relevant data)  
+
+    .. note:: 
+        A moench05 chip has 160 rows and 50 cols per adc and has dynamic range 16 bit. Each adc sample is encoded in 16 bits. 
+        The transformation thus requires 160*50*16/16 = 8000 analog samples per adc. 
+    """
     #Could be moved to C++ without changing the interface
     def __init__(self):
         self.pixel_map = _aare.GenerateMoench05PixelMap()
diff --git a/python/src/bind_Defs.hpp b/python/src/bind_Defs.hpp
index e048f1c..f091788 100644
--- a/python/src/bind_Defs.hpp
+++ b/python/src/bind_Defs.hpp
@@ -22,4 +22,9 @@ void define_defs_bindings(py::module &m) {
     moench04.attr("nPixelsPerSuperColumn") = Moench04::nPixelsPerSuperColumn;
     moench04.attr("superColumnWidth") = Moench04::superColumnWidth;
     moench04.attr("adcNumbers") = Moench04::adcNumbers;
+
+    auto moench05 = py::class_<Moench05>(m, "Moench05");
+    moench05.attr("nRows") = Moench05::nRows;
+    moench05.attr("nCols") = Moench05::nCols;
+    moench05.attr("adcNumbers") = Moench05::adcNumbers;
 }
diff --git a/src/PixelMap.cpp b/src/PixelMap.cpp
index ab8d3ee..d77d233 100644
--- a/src/PixelMap.cpp
+++ b/src/PixelMap.cpp
@@ -56,16 +56,22 @@ NDArray<ssize_t, 2> GenerateMoench04AnalogPixelMap() {
 }
 
 NDArray<ssize_t, 2> GenerateMoench05PixelMap() {
-    std::array<int, 3> adc_numbers = {5, 9, 1};
-    NDArray<ssize_t, 2> order_map({160, 150});
+    constexpr size_t num_adcs = 3; // num adcs with relevant data
+    constexpr std::array<int, num_adcs> adc_numbers = Moench05::adcNumbers;
+    NDArray<ssize_t, 2> order_map({Moench05::nRows, Moench05::nCols});
+    constexpr size_t n_cols = Moench05::nCols / adc_numbers.size();
     int n_pixel = 0;
-    for (int row = 0; row < 160; row++) {
-        for (int i_col = 0; i_col < 50; i_col++) {
-            n_pixel = row * 50 + i_col;
-            for (int i_sc = 0; i_sc < 3; i_sc++) {
-                int col = 50 * i_sc + i_col;
+
+    constexpr size_t num_adcs_enabled =
+        12; // number of adcs enabled -> for 10g adcs are enabled in blocks of 4
+
+    for (size_t row = 0; row < Moench05::nRows; row++) {
+        for (size_t i_col = 0; i_col < n_cols; i_col++) {
+            n_pixel = row * n_cols + i_col;
+            for (size_t i_sc = 0; i_sc < num_adcs; i_sc++) {
+                size_t col = n_cols * i_sc + i_col;
                 int adc_nr = adc_numbers[i_sc];
-                int i_analog = n_pixel * 12 + adc_nr;
+                int i_analog = n_pixel * num_adcs_enabled + adc_nr;
 
                 // analog_frame[row * 150 + col] = analog_data[i_analog] &
                 // 0x3FFF;