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update new protocol and new hardware

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This commit is contained in:
pique_n
2022-06-10 15:40:49 +02:00
parent d6e9c78497
commit 75840c7d51
41 changed files with 1111 additions and 412 deletions
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2
Core/Drivers/ADCD_AdcDriver.c
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@ -272,7 +272,7 @@ BOOL ADCD_boReadData( ADCD_EnTemps eChannel, PU8 pu8Error, PU16 pu16Data )
return 0;
}
if( ( u16Data & 0x01 ) == 0x01 )
if( ( u16Data & 0x00 ) == 0x01 )
{
*pu8Error |= ADCD_STATUS_DATA_ERROR;

12
Core/Drivers/ANPI_AnalogPortsIn.c
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@ -55,7 +55,7 @@
#define ADC_RES (4096) // ADC resolution: 12 bits
#define NR_OF_ADCS ANPI_eInNumberOfInputs // number of internal adc channels
#define INT_ADC_REF (3.2968f)// int. reference voltage for conversion
#define INT_ADC_REF (3.3f)// int. reference voltage for conversion
#define BUFFER_SIZE NR_OF_ADCS * 2
#define BUFFER_HALF_SIZE NR_OF_ADCS
@ -108,7 +108,7 @@ LOCAL osMutexId_t m_pstMutexID = NULL;
LOCAL CONST FLOAT m_aflConversionFactor[ANPI_eInNumberOfInputs] =
{
10, // 01 ANPI_eSupplyVoltage24V
-5, // 02 ANPI_eSupplyCurrent24V
5, // 02 ANPI_eSupplyCurrent24V
10, // 03 ANPI_eOutputVoltage
5, // 04 ANPI_eOutputCurrent
};
@ -117,9 +117,9 @@ LOCAL CONST FLOAT m_aflConversionFactor[ANPI_eInNumberOfInputs] =
LOCAL CONST FLOAT m_aflOffset[ANPI_eInNumberOfInputs] =
{
0.0f, // 01 ANPI_eSupplyVoltage24V
2.5f, // 02 ANPI_eSupplyCurrent24V
4.5f, // 03 ANPI_eOutputVoltage
2.5f, // 04 ANPI_eOutputCurrent
8.25f, // 02 ANPI_eSupplyCurrent24V
14.85f, // 03 ANPI_eOutputVoltage
8.25f, // 04 ANPI_eOutputCurrent
};
// inputs are connected to the following ADCs
@ -248,7 +248,7 @@ VOID vTask( PVOID arg )
VARH_vSetVariableDataFromSystemFloat( VARH_eSupply_U, aflValues[ANPI_eSupplyVoltage24V] );
VARH_vSetVariableDataFromSystemFloat( VARH_eSupply_I, aflValues[ANPI_eSupplyCurrent24V] );
VARH_vSetVariableDataFromSystemFloat( VARH_eSupply_P, aflValues[ANPI_eSupplyVoltage24V] * aflValues[ANPI_eSupplyCurrent24V] );
VARH_vSetVariableDataFromSystemFloat( VARH_eSupply_P, aflValues[ANPI_eSupplyVoltage24V] * (aflValues[ANPI_eSupplyCurrent24V]) );
osMutexRelease( m_pstMutexID ); // release mutex
}

2
Core/Drivers/ANPO_AnalogPortsOut.c
View File

@ -119,7 +119,7 @@ extern DAC_HandleTypeDef hdac1;
BOOL ANPO_boInitializeModule( VOID )
{
BOOL boOK = TRUE;
boOK &= HAL_DAC_Start( &hdac1, DAC_CHANNEL_1 ) == HAL_OK ? TRUE : FALSE;
return( boOK );

2
Core/Drivers/CAND_CanDriver.c
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@ -145,7 +145,7 @@ BOOL CAND_boInitializeModule( VOID )
stFilter.FilterIdHigh |= u8BoardId >> 3;
stFilter.FilterIdLow |= u8BoardId << 5;
HAL_CAN_ConfigFilter(&hcan1, &stFilter);
boOK &= ( HAL_CAN_ConfigFilter(&hcan1, &stFilter) == HAL_OK ) ? TRUE : FALSE;
boOK &= ( HAL_CAN_Start(&hcan1) == HAL_OK ) ? TRUE : FALSE;

3
Core/Drivers/DIPO_DigitalPorts.c
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@ -99,6 +99,7 @@ LOCAL CONST StDigitalIO m_astInputs[DIPO_eInNumberOfInputs] =
{
{ GPIOB, { GPIO_PIN_7, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 00 DIPO_ePG
{ GPIOC, { GPIO_PIN_15, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 01 DIPO_eADR2
{ GPIOB, { GPIO_PIN_4, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 01 DIPO_eADR2
{ GPIOB, { GPIO_PIN_3, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 02 DIPO_eADR1
{ GPIOA, { GPIO_PIN_15, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 03 DIPO_eADR0
@ -111,7 +112,7 @@ LOCAL CONST StDigitalIO m_astOutputs[DIPO_eOutNumberOfOutputs] =
{ GPIOB, { GPIO_PIN_6, GPIO_MODE_OUTPUT_PP, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, TRUE, FALSE }, // 00 DIPO_eCS_C
{ GPIOB, { GPIO_PIN_5, GPIO_MODE_OUTPUT_PP, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, TRUE, FALSE }, // 01 DIPO_eCS_H
{ GPIOA, { GPIO_PIN_10, GPIO_MODE_OUTPUT_PP, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 02 DIPO_eLED
{ GPIOC, { GPIO_PIN_14, GPIO_MODE_OUTPUT_PP, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 02 DIPO_eLED
{ GPIOA, { GPIO_PIN_8, GPIO_MODE_OUTPUT_PP, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 03 DIPO_eEN
};

7
Core/Drivers/DIPO_DigitalPorts.h
View File

@ -62,9 +62,10 @@ typedef enum
{
DIPO_ePG = 0, // 00 DIP 1
DIPO_eADR2 = 1, // 01 DIP 2
DIPO_eADR1 = 2, // 02 DIP 3
DIPO_eADR0 = 3, // 03 DIP 4
DIPO_eADR3 = 1, // 01 DIP 2
DIPO_eADR2 = 2, // 01 DIP 2
DIPO_eADR1 = 3, // 02 DIP 3
DIPO_eADR0 = 4, // 03 DIP 4
DIPO_eInNumberOfInputs, // Must be last entry
} DIPO_EnDigitalInput;

4
Core/Drivers/PECO_PeltierController.h
View File

@ -57,8 +57,8 @@ extern "C" {
//=================================================================================================
typedef enum {
PECO_eConstTemp,
PECO_eConst_Voltage
PECO_eConstTemp = 0,
PECO_eConst_Voltage = 1
} PECO_eMode;
//=================================================================================================