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filters CAN bus

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This commit is contained in:
pique_n
2022-07-07 18:19:51 +02:00
parent b8d62e02e0
commit 312f6fcf9c
5 changed files with 14 additions and 15 deletions
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11
Core/Drivers/CAND_CanDriver.c
View File

@ -81,9 +81,9 @@
CAND_pfnRxCallback m_pfnRxCallback = NULL;
CAN_FilterTypeDef stFilter_public = {
(CAND_SHIFT<<6)|(CAND_PUBLIC<<5), // FilterIdHigh
(CAND_SHIFT<<14)|(CAND_PUBLIC<<13), // FilterIdHigh
0x0000, // FilterIdLow
0xC000, // FilterMaskIdHigh
0xE000, // FilterMaskIdHigh
0x0000, // FilterMaskIdLow
CAN_FILTER_FIFO0, // FilterFIFOAssignment
0x00, // FilterBank
@ -94,9 +94,9 @@ CAN_FilterTypeDef stFilter_public = {
};
CAN_FilterTypeDef stFilter_private = {
(CAND_SHIFT<<6)|(CAND_PRIVATE<<5), // FilterIdHigh
(CAND_SHIFT<<14)|(CAND_PRIVATE<<13), // FilterIdHigh
0x0000, // FilterIdLow
0xC1C0, // FilterMaskIdHigh
0xE1E0, // FilterMaskIdHigh
0x0000, // FilterMaskIdLow
CAN_FILTER_FIFO0, // FilterFIFOAssignment
0x01, // FilterBank
@ -153,8 +153,7 @@ BOOL CAND_boInitializeModule( VOID )
u8BoardId |= DIPO_boGetInput(DIPO_eADR2) << 2;
u8BoardId |= DIPO_boGetInput(DIPO_eADR3) << 3;
stFilter_private.FilterIdHigh |= u8BoardId >> 3;
stFilter_private.FilterIdLow |= u8BoardId << 5;
stFilter_private.FilterIdHigh |= u8BoardId << 5;
boOK &= ( HAL_CAN_ConfigFilter(&hcan1, &stFilter_public) == HAL_OK ) ? TRUE : FALSE;
boOK &= ( HAL_CAN_ConfigFilter(&hcan1, &stFilter_private) == HAL_OK ) ? TRUE : FALSE;

4
Core/Drivers/DIPO_DigitalPorts.c
View File

@ -99,8 +99,8 @@ LOCAL CONST StDigitalIO m_astInputs[DIPO_eInNumberOfInputs] =
{ GPIOB, { GPIO_PIN_7, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 00 DIPO_ePG
{ GPIOC, { GPIO_PIN_15, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 01 DIPO_eADR3
{ GPIOB, { GPIO_PIN_4, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 01 DIPO_eADR2
{ GPIOB, { GPIO_PIN_3, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 02 DIPO_eADR1
{ GPIOB, { GPIO_PIN_3, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 02 DIPO_eADR2
{ GPIOB, { GPIO_PIN_4, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 01 DIPO_eADR1
{ GPIOA, { GPIO_PIN_15, GPIO_MODE_INPUT, GPIO_NOPULL, GPIO_SPEED_FREQ_MEDIUM, 0 }, FALSE, TRUE }, // 03 DIPO_eADR0
};